HJS22 SPECIFICATIONS

After several redesign and revisions the final design has the following specifications:

* 8 bits data bus, 16 bits address bus.
* Horizontal micro-programmering (256 words, each 40 bits) stored in 5 EPROMs MM5203Q (PDF / Picture)
* 1 accumulator.
* 16 general purpose registers per interrupt level located in main storage (0x0000 - 0x00FF).
* 16 interrupt levels.
* 64 instructie opcodes.
* 8 addressing modes (and even some more):
      - memory direct
      - memory indirect
      - register
      - register indirect
      - immediate
      - PC relative short ( +/- 127 bytes)
      - PC relative long ( +/- 32kbyte)
      - register indexed
* Display and modify main storage content by hardware/micro-code.
* Single instruction execution by hardware/microcode.
* Average 9 micro-code cycles per instruction.
* Cycle time 4 micro-seconds. (determined by the MM5203Q access time)
* No DMA (Direct Memory Access)
* No software stack.

HJS22 Hardware